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雙極性晶體管

二極管

ESD保護、TVS、濾波和信號調節(jié)ESD保護

MOSFET

氮化鎵場效應晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車應用認證產品(AEC-Q100/Q101)

74LVC1G11GW-Q100

Single 3-input AND gate

The 74LVC1G11-Q100 is a single 3-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • ±24 mA output drive (VCC = 3.0 V)

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

參數(shù)類型

型號 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVC1G11GW-Q100 1.65?-?5.5 CMOS/LVTTL ± 32 2.6 175 1 low -40~125 284 56.7 172 TSSOP6

PCB Symbol, Footprint and 3D Model

Model Name 描述

封裝

型號 可訂購的器件編號,(訂購碼(12NC)) 狀態(tài) 標示 封裝 外形圖 回流焊/波峰焊 包裝
74LVC1G11GW-Q100 74LVC1G11GW-Q100H
(935299287125)
Active VU SOT363-2
TSSOP6
(SOT363-2)
SOT363-2 SOT363-2_125

環(huán)境信息

型號 可訂購的器件編號 化學成分 RoHS RHF指示符
74LVC1G11GW-Q100 74LVC1G11GW-Q100H 74LVC1G11GW-Q100 rohs rhf rhf
品質及可靠性免責聲明

文檔 (8)

文件名稱 標題 類型 日期
74LVC1G11_Q100 Single 3-input AND gate Data sheet 2023-08-15
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
lvc1g11 74LVC1G11 IBIS model IBIS model 2015-09-06
SOT363-2 plastic thin shrink small outline package; 6 leads; body width 1.25 mm Package information 2022-11-21
SOT363-2_125 TSSOP6 ; Reel pack for SMD, 7"; Q3/T4 product orientation Packing information 2022-11-04
74LVC1G11GW-Q100_Nexperia_Product_Reliability 74LVC1G11GW-Q100 Nexperia Product Reliability Quality document 2024-06-16

支持

如果您需要設計/技術支持,請告知我們并填寫 應答表 我們會盡快回復您。

模型

文件名稱 標題 類型 日期
lvc1g11 74LVC1G11 IBIS model IBIS model 2015-09-06
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02

PCB Symbol, Footprint and 3D Model

Model Name 描述

訂購、定價與供貨

型號 Orderable part number Ordering code (12NC) 狀態(tài) 包裝 Packing Quantity 在線購買
74LVC1G11GW-Q100 74LVC1G11GW-Q100H 935299287125 Active SOT363-2_125 3,000 訂單產品

樣品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可訂購部件

型號 可訂購的器件編號 訂購代碼(12NC) 封裝 從經銷商處購買
74LVC1G11GW-Q100 74LVC1G11GW-Q100H 935299287125 SOT363-2 訂單產品
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